The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to an E-fuse that is compatible with nanowire based technology and a method of forming such an E-fuse.
For more than three decades, the continued miniaturization of metal oxide semiconductor field effect transistors (MOSFETs) has driven the worldwide semiconductor industry. Various showstoppers to continued scaling have been predicated for decades, but a history of innovation has sustained Moore's Law in spite of many challenges. However, there are growing signs today that metal oxide semiconductor transistors are beginning to reach their traditional scaling limits. Since it has become increasingly difficult to improve MOSFETs and therefore complementary metal oxide semiconductor (CMOS) performance through continued scaling, further methods for improving performance in addition to scaling have become critical.
The use of non-planar semiconductor devices such as, for example, semiconductor nanowire field effect transistors (FETs), is the next step in the evolution of CMOS devices. Formation of semiconductor nanowire FETs is known. However, there is a need for providing nanowire electrically programmable fuses that can be used in forming integrated circuits that contain semiconductor nanowire FETs.